Verification and Testing Infrastructure for Secure RISC-V Architectures
VERITAS aims to create a formal and flexible ecosystem for the verification and testing of RISC-V architectures.
As an open and increasingly popular ISA, RISC-V offers a cost-effective alternative to proprietary options like ARM and x86, which often limit innovation through high licensing fees and restricted access. Despite its promise, widespread adoption of RISC-V is held back by the lack of reliable, scalable tools to ensure compliance, security, and performance.
This project addresses that gap by developing a robust verification and testing infrastructure grounded in formal methods and automation.
By improving the reliability and trustworthiness of RISC-V implementations, the project supports its broader adoption in critical areas such as embedded systems, cloud computing, automotive, IoT, and high-performance computing. This is especially relevant for emerging chipmakers and European technology initiatives seeking greater independence and innovation in the semiconductor sector.
Project lead: SBA Research